IBM has debuted what it calls the world's first sub-1 nanometer chip technology, according to the company's newsroom announcement on June 25. The breakthrough centers on a 0.7-nanometer design that, per EE Times, promises to pack roughly 100 billion transistors into a piece of silicon CNET describes as the size of a fingernail.
The key innovation is a new 3D architecture IBM calls a "nanostack." According to coverage from MSN and EE Times, this approach also enables denser SRAM, a type of fast on-chip memory. EE Times reports that IBM is targeting production within five years, meaning this is a research milestone and prototype rather than a product you can buy today.
Much of the attention frames this as a development aimed at AI. The Times of India and other outlets describe it as technology for AI chips smaller than 1 nanometer, and an MSN headline ties it directly to the race to make AI chips smaller and more efficient. CNET notes the chip could find a home in future data centers.
It's worth being precise about IBM's role. As 24/7 Wall St. points out, IBM is not becoming a chipmaker; it develops the underlying technology that manufacturers can license and build on. Investors reacted positively regardless, with Yahoo Finance reporting that IBM stock popped on the news of a chip "the size of a fingernail" in its AI push.
Multiple outlets framed the work as a step beyond Moore's Law, the long-running expectation that transistor density keeps doubling.
Why it matters: shrinking transistors below one nanometer could pack far more computing power into the same space, a crucial lever for running increasingly demanding AI systems more efficiently.